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Latent Short Circuit Failure in High-rel PCBs
Latent Short Circuit Failure in High-rel PCBs
This paper describes inspections performed on base materials, manufacturing processes and final PCBs.
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Authored By:
Stan Heltzel
European Space Agency
Noordwijk, Netherlands


Summary
Latent short circuit failures have been observed during testing of Printed Circuit Boards (PCB) for power distribution of spacecraft of the European Space Agency. Root cause analysis indicates that foreign fibers may have contaminated the PCB laminate. These fibers can provide a pathway for electromigration if they bridge the clearance between nets of different potential in the presence of humidity attracted by the hygroscopic laminate resin. PCB manufacturers report poor yield caused by contamination embedded in laminate.

Inspections show that fiber contamination is present on prepreg and etched inner layers. Further fiber contamination may be attracted in the manufacturing environment due to static charging. The requirements for cleanliness that are specified for final PCBs are orders of magnitude more stringent than those specified for base materials. This paper describes inspections performed on base materials, manufacturing processes and final PCBs. It describes test methods that detect reduced insulation caused by contamination and Electromigration. Moreover, a proposal is presented specifying tightened requirements for a new class of base materials for the manufacture of high-rel PCBs.

Conclusions
Latent short circuit failure of power PCBs has been associated with fiber contamination of the dielectric material. Tests and inspections have shown various sources of contamination in laminate, prepreg and on etched innerlayers. It has been demonstrated by IR tests that contamination can cause breach of insulation due to electromigration.

Risk mitigations have been specified in PCB design, PCB manufacture and base material supply. These include conservative design of insulation, inspection on base laminates and prepreg, in-process inspections on etched innerlayers, clean room practices in manufacture, cleaning of innerlayers and electrical testing on final PCBs.

IPC-4101 specifies a cleanliness level for base materials that is in conflict with high-rel PCB manufacture and requirements for insulation specified for IPC class 3/A. A specification for a new class of cleaner base materials is being issued to key base material suppliers and is proposed to be included in a revision of IPC-4101.

Initially Published in the IPC Proceedings

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