Electronics Assembly Knowledge, Vision & Wisdom
Human-Induced Contamination on PCB Assembly
Human-Induced Contamination on PCB Assembly
This paper will discuss an experiment that was performed to investigate the effects of "contaminants" that could be measured with SIR testing.
Analysis Lab

Authored By:
Eric Bastow
Indium Corporation
Clinton, New York
,{url:'http://www.circuitinsight.com/videos/programs_final.mp4'}], clip:{autoBuffering:true, autoPlay:true, scaling:'scale' } }).ipad();
Summary
With the ever-present pressure toward miniaturization in electronic devices, smaller distances between traces and component terminations are likely to increase the devices' sensitivity to contamination scenarios that may cause current leakage. Traditionally, with "no-clean" processes, the focus has been on the conductivity of flux residues, which can be measured with industry accepted techniques such as IPC J-STD-004B SIR (Surface Insulation Resistance) testing (IPC-TM-650 2.6.3.7).

However, the manufacturing environment, especially in low-cost labor markets, and even on otherwise well-controlled shop floors, may be far from representative of the "perfect world." Other materials may find their way on to the surface of the PCB, often introduced through negligent human activity and handling that may or may not have a negative impact on the electrical reliability of the device.

This paper will discuss an experiment that was performed to investigate the effects of "contaminants" that could be measured with SIR testing. The contaminants were tested by themselves as well as in conjunction with a halogen-free, Pb-free, no-clean solder paste. The materials investigated as contaminants were: human skin oil/perspiration, high temperature reflow oven chain oil, pepperoni pizza grease, hand cream/lotion, and tap water.
Conclusions
The message that these experiments provide is that contamination has the potential to reduce the surface insulation resistance (SIR) of an assembly. The level of reduction may or may not create a reliability issue. However, it is important to note that the test vehicle has 0.4 mm lines and 0.5 mm spaces and tested at 5 VDC. One has to ask the question, if contamination produces a measurable reduction in SIR performance in these test conditions, what is the impact if the spacing is smaller and/or the voltage is higher? In such cases, the level of tolerance toward contamination could be, and should be, much less.
Initially Published in the IPC Proceedings
Submit A Comment

Comments are reviewed prior to posting. Please avoid discussion of pricing or recommendations for specific products. You must include your full name to have your comments posted. We will not post your email address.

Your Name


Company


E-mail


Country


Comments


Authentication

Please type the number displayed into the box. If you receive an error, you may need to refresh the page and resubmit the information.



Related Programs
bullet Mitigating Tin Whiskers in Alternative Lead-Free Alloys
bullet Testing PCBs for Creep Corrosion
bullet Gold Contact Flux Contamination Failures
bullet What Causes Oxidation on SMT Pads?
bullet Causes of Popcorn Defects in Plastic Packages
bullet Issues with Circuit Boards Exposed to Rain
bullet Addressing Head-In-Pillow Defects
bullet Pad Cratering Evaluation of PCBs
bullet Acceptable Rate for Head in Pillow?
bullet Human-Induced Contamination on PCB Assembly
More Related Programs
About | Advertising | Contact | Directory | Directory Search | Directory Submit | Privacy | Programs | Program Search | Sponsorship | Subscribe | Terms

Circuit Insight
6 Liberty Square #2040, Boston MA 02109 USA

Jeff Ferry, Publisher | Ken Cavallaro, Editor/Business Manager

Copyright © Circuitnet LLC. All rights reserved.
A Circuitnet Media Publication