Electronics Assembly Knowledge, Vision & Wisdom
Influence of PCB Surface Features on BGA Assembly Yield
Influence of PCB Surface Features on BGA Assembly Yield
This paper provides insight into the impact of irregularities on BGA package surface mount yield, and guidance on design and to limit their impact.
Production Floor

Production Floor programs cover topics including:
CAD/CAM/CIM/EDA, Circuit Board Handling, Clean Room, Cleaning Operations, Component Insertion, Component Prep, Dispensing, Feeders, Fume Extraction, Hand Tools, Labeling/Marking, Lasers, Material Handling, Odd Form, Ovens/Curing, Packaging, Stencil Printing, Repair/Rework, Soldering and more.
Submit A Comment
Comments are reviewed prior to posting. You must include your full name to have your comments posted. We will not post your email address.

Your Name

Your Company

Your E-mail

Your Country

Your Comment

Authored By:
Satyajit Walwadkar, Todd Harris, Bite Zhou, Aditya Vaidya, Juan Landeros, Alan McAllister
Intel Corporation
Hillsboro, OR, USA

Demand for higher performance products in thinner and lighter form factors has driven a trend towards thinner ball grid array (BGA) packages with higher pin counts at a reduced pitch. As solder ball density increases and solder ball dimensions decrease, manufacturing yield during surface mount assembly has become increasingly sensitive to the surface topography of the printed circuit board (PCB). Irregularities in the local surface topography are introduced by the uneven distribution of copper on the outer layers of the PCB due to copper plane layout, trace routing, via placement and BGA pad definitions. The conformal solder mask coating used to insulate these copper features and define pad dimensions can result in significant variation in board thickness and surface feature dimensions. This paper provides insight into the impact of these irregularities on BGA package surface mount yield, and provide guidance on design and manufacturing practices to limit their impact.

This paper demonstrated the influence of PCB design features on the resulting SMT quality. PCB design features in the center of cavity grid array FCBGA package, in form of raised PCB surface topography, was shown to interfere with package collapse, alter solder joint formation and create open defects. Uneven PCB surface features created as a result of dense trace routing, impacts the solder joint creation during the reflow soldering process and may result in increased risk of solder joint shorts as demonstrated in this paper. Traditional SMT process optimizations did improve quality in some cases. However, increased density and pitch reductions may drive demands for improved PCB features design for manufacturing measures.

PCB designers are challenged to deal with a diverse set of requirements and driven to design with complex interactions. As detailed, the ongoing densification of platform designs increases sensitivities and drives the need to improve design margins. It is important that platform designers be aware of possible interference of PCB surface features and impacts to SMT assembly. Some of the PCB design recommendation based on the SMT impact from two PCB surface feature cases studied here, would be to try and possibly shift any isolated copper planes at the PCB surface in the BGA region to internal PCB layers.

Additionally, focus should be to try and minimize any surface profile and pad type variations. For example, copper thickness of outer layers can impact adjacent solder mask surface profiles as shown in Figure 20.

Figure 20. Surface profile measurements of thick and thin outer layer copper foil thickness coupons. Cross sections illustration of copper thickness impact to solder mask surface profile variation.

Dense trace routing networks in the BGA region at the PCB surface may drive pad type variations. If PCB thickness is not a constraint, then similar approach of having only pads at the PCB surface by routing the entire trace network through internal PCB layers should be considered as shown in Figure 21.

Figure 21. Planar and cross section demonstrate of stackup variations that may benefit outer layer solder mask profile variation.

Initially Published in the SMTA Proceedings

No comments have been submitted to date.
Free Newsletter Subscription
Every issue of the Circuit Insight email newsletter will bring you the latest information on the issues affecting you and your company.

Insert Your Email Address

Directory Search

Program Search
Related Programs
bullet Insulation Resistance of Dielectric Materials
bullet Is HASL a Good Choice for Surface Finish?
bullet Board Processes and Effects on Fine Copper Barrel Cracks
bullet Long Term Thermal Reliability of Printed Circuit Board Materials
bullet Final Finish Specifications Review
bullet Embedded Components: A Comparative Analysis of Reliability
bullet Study of Various PCBA Surface Finishes
bullet New High-Performance Organophosphorus Flame Retardant
bullet Simulation of Embedded Component
bullet The Effect of Radiation Losses on High Frequency PCB Performance
More Related Programs