Electronics Assembly Knowledge, Vision & Wisdom
Returning to Basics in the SMT Screen Printing Process
Returning to Basics in the SMT Screen Printing Process
This paper showcases a new stencil process that was discovered by reverting to the basics.
Production Floor

Production Floor programs cover topics including:
CAD/CAM/CIM/EDA, Circuit Board Handling, Clean Room, Cleaning Operations, Component Insertion, Component Prep, Dispensing, Feeders, Fume Extraction, Hand Tools, Labeling/Marking, Lasers, Material Handling, Odd Form, Ovens/Curing, Packaging, Stencil Printing, Repair/Rework, Soldering and more.
Submit A Comment
Comments are reviewed prior to posting. You must include your full name to have your comments posted. We will not post your email address.

Your Name


Your Company


Your E-mail


Your Country


Your Comment



Authored By:
Jim Villalvazo
Interlatin

Summary
he SMT assembly process is continuously challenged by the factors which enhance circuit board performance and limit productivity. The pick and place and reflow systems reflect these driven issues by adding more and more controls to their systems, but the fact is one of the age old processes continues to operate within the same rules since the dawn of the SMT assembly world: The SMT screen printing.

The SMT print process is very old and construed as being simple. The process is not complicated but controlling the outcome is complex. Given all the factors involved in boards and technologies, the printer environment is a major factor to control and improve yields from the beginning of the SMT assembly process.

Changing stencil materials (SS, Ni, Electroform or coated, including Nano) is one historically prescribed solution to improve the SMT screen printing process. However, this direction has not given the expected results, the key factor being productivity, for manufacturing. The majority of the SMT community gives direction that stipulates stencils today drive the outcome of the SMT assemblies.

The Nano coated stencil concept improved paste release to pad which is said, resulted in improved stencil cleaning performance, but as with all coatings there is a productivity negative factor; it wears.

This paper showcases a new stencil process that was discovered by reverting to the basics:understanding the reason for each stencil material process, focusing on detailed finishes and a disciplined aperture design process, maintaining original designs, and making the correctly designed apertures to control the paste deposition. The test results drove us to focus the efforts on the aperture walls.

In this paper we will demonstrate with lab tests SMT process results how the improved paste release results in improved SMT print process performance and its positive impact on SPI yields and EOL performance.

Conclusions
The common challenge is sustaining a paste deposition capable of meeting the SMT assembly requirements based on design. The experiments proved that each of the technologies used for stencils have merit, but not one has a complete scope of the print environment. The constant here is the tools, which must be improved to help produce the results required. This process tool, which with proper design will enhance the printers performance and support the EOL yieldsmeetsthe demands of the manufacturing world, while improving the process and maintaining it.

Beware! All processes must be evaluated prior to actual design. The theory of improving a stencil aperture design to improve manufacturing yields is achieved by improving the age old original stencil. Back to basics.

Initially Published in the IPC Proceedings

Comments
No comments have been submitted to date.
Free Newsletter Subscription
Every issue of the Circuit Insight email newsletter will bring you the latest information on the issues affecting you and your company.

Insert Your Email Address

Directory Search


Program Search
Related Programs
bullet Hand Printing using Nanocoated and other High End Stencil Materials
bullet Effect of Thermal Cycling on Subsequent Drop Behavior of Assemblies
bullet Investigation Into the Durability of Stencil Coating Technologies
bullet Questions About Handling Solder Paste
bullet Contamination and Risks Related to ESD Gloves and Finger Cots
bullet High-Volume-Manufacturing of BVA Enabled Advanced POP
bullet Assembly Reliability of TSOP/DFN PoP Stack Package
bullet Is There a Limit to the Step in a Step Stencil?
bullet ASEP a Next Generation Electronics Manufacturing Technology
bullet Enhance the Shock Performance of Ultra-Large BGA Components
More Related Programs