Ron Blake, Andy Oh, Carmichael Gugliotti, Bill DeCesare, Don DeSalvo, Rich Bellemare MacDermid
Enthone Electronics Solutions
Waterbury, CT, USA
This paper discusses a through hole copper filling process for application in high density interconnect constructions on thin IC and LED substrates where high reliability and thermal management are essential. The process consists of a two step acid copper plating cycle. The first step utilizes periodic pulse reverse electroplating to form a conductive copper bridge across the middle of a through hole followed by direct current electroplating to fill the resultant vias formed in the bridge cycle.
The ability of the process to fill a variety of through hole sizes on substrates of varying thickness while minimizing the overall surface copper build up are critical in applications requiring efficient thermal management as circuit miniaturization continues.
The through hole fill technology and factors that affect its performance such as substrate thickness and through hole diameter will be presented in this paper.
As technological advances continue in the electronics industry in the manufacturing of substrates for applications in HDI, IC, and LED, new challenges will arise for the design engineers. With continued trends toward miniaturization, new manufacturing techniques such as stacking of vias, and the use of high power devices that generate considerable heat, the need for improved methods of thermal management are required to efficiently conduct heat away from the electronic devices to improve device reliability and life. Copper through hole plating provides another tool to the engineer for the design of electronic circuitry. Figure 16 illustrates a real world application of copper through hole plating to conduct heat away from an LED device allowing it to operate at a lower temperature. In this example, the use of copper through hole filling reduced the operating temperature of the device from 126C to 92C.
The copper through plating process provides a versatile two step process consisting of a periodic pulse reverse step with specialized waveforms that allow the middle of a through hole to be bridged and sealed, forming two microvias that can subsequently be filled with DC based via fill chemistries.
The design engineer must understand the nuances of the copper through hole plating process and how the design of the board influences the results of each step of the plating process. The results presented in this paper illustrate the influence that board design features such as hole size and pitch and core thickness have on the critical outputs of the plating process such as ability to bridge, total plated surface copper, dimple size, aspect ratio, and total process time. When designing a substrate for the utilization of copper through hole plating, the design engineer must choose a suitable substrate and thickness and incorporate hole sizes and layouts that will minimize output variations. In this way, a robust, reliable copper through hole process can be realized (See Figure 17).
Initially Published in the SMTA Proceedings