Is there a minimum spacing requirement or should we apply SMT components to comply with SMT pick and place systems on the market? The Assembly Brothers, Jim Hall and Phil Zarrow, discuss this question. Board Talk
Board Talk is presented by Phil Zarrow and Jim Hall of ITM Consulting.
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With over 35 years experience in PCB assembly, Phil is one of the leading experts in SMT process failure analysis.
He has vast experience in SMT equipment, materials and processes.
A Lean Six-Sigma Master Blackbelt, Jim has a wealth of knowledge in soldering, thermal technology, equipment and process basics.
He is a pioneer in the science of reflow.
And welcome to Board Talk with Jim Hall and Phil Zarrow, the Assembly Brothers pick and place. We are here to solve your SMT dilemmas, problems and questions and all things SMT. What is the question today?
Well, it's in the area of pick and place. It comes from P.R. Is there a general minimum spacing requirement or should we apply SMD components to comply with the majority of the SMT pick and place systems on the market?
Are there a different minimum spacing requirements for small chip caps such as 0204s or 0805s versus larger components such as QFPs?
Well, to the best of our knowledge there is no specification per se, you know, some governing really you can go by.
It's basically driven by the capabilities of the pick and place machine, particularly the tooling they are using for pick up and placement and so that's going to basically run it.
The accuracy, obviously you have to have enough clearance to allow for the accuracy plus and minus 50 microns or 40 microns or 70 microns whatever it is and you probably want to give a little more space because those are really done at 3-Sigma.
Usually I think of the clearance issues as being driven more by the other processes rather than the pick and place. For instance if you are talking about ultra small chip component such as 0204s and 01005s, a number of issues have been raised about spacing relative to printing, the ability to print repeatedly in very tight arrays has been shown to be somewhat of a problem.
That is you go with spacing those very ultra small chips closer and closer together. You start to have printing related from stencil issues and so forth.
Another one, a bigger components is rework. If you are talking about QFPs or certainly area array parts. You need to think about the clearance you need in order to remove the parts. To get your hot air tools down in there to avoid partial reflow of adjacent components and so forth.
So I guess I agree with my brother for once that there are no specs beyond the individual repeatability of your placement machines, but you should look at your other processes such as printing, with your stencil design and the ability to repeatedly print at tight spacings and rework.
There may be others that I am not thinking of, there probably are.
Yeah but I totally agree with my brother. I think you will find, yeah I know the planets are aligning here but I think you will find that the common denominator, there the lowest common denominator is repair and that's probably going to basically drive it. So taking a look at what kind of components you are dealing with and what kind of equipment you are using there.
Reliability is for yield and soldering. I mean, it's used like a bit complex, closer and close. And inevitably the pads gets closer and closer. And you have to say am I creating too many bridging opportunities.
A lot of times I go to the shows and you will see them demonstrating pick and place machines by putting components side by and side and drawing little pictures and portraits and spelling out things. But you know, from a practical standpoint, those of us actually building working circuits not pretty pictures these are some of the things you would want to consider.
So how is that for creating mass confusion and regardless of how close you are placing your components and what those components are, whatever you do
Don't solder like brother.
Please don't solder like my brother.
I believe standard spacing should be applied to components despite their variable size as it can create more confusion. Additionally, the selection of pick and place systems should be dependent on accuracy instead of the component size.
Pankaj Shrotre, Sierra
I would recommend contacting your manufacturer and discussing their capabilities or even submitting your design for a DFM review by them.
John Keller, ASL
Paul Smith said it well. Component spacing has little to do with pick/place capability. It is a design requirement (minimum electrical clearance requirements) that is listed on nearly every single PWB fabrication drawing in the industry, as defined in IPC 2221 and the Design Standards, notably IPC-D-279 section 3.3.9.
R. Dean Stadem, General Dynamic Mission Systems
I, for one, am grateful that the Brothers put forth answers based on their real manufacturing floor experience. Glad they're building PCBAs rather than sitting around reading, memorizing and reciting specifications. Thanks guys!
Walt Bishop, MIT
IPC-7351 has component spacing/courtyard for level 1, 2 , 3 assemblies.
Vinh Nguyen, L3 Telemetry and RF
IPC-7351A also provides requirements for the keep-out areas (courtyard excess) for most common surface mount packages.
Adam Feldman, ECI Technology Group, Canada
I believe you've missed an important part of the answer, gentlemen. IPC-2221 deals with the minimum electrical clearances of circuit board design. This should be considered for component placement as well, especially where substantial voltage is present.
Paul J. Smith, Masterclock, Inc., USA
You missed a very big issue, the size of the placement tool. Even at 0603 you need to watch out as the outside edge of a tool extends past the components, typically in the narrow dimension.