Rao R. Tummala, Ph.D., Venkatesh Sundaram, Ph.D., Qiao Chen, Hao Lu, and Gokul Kumar
3D Systems Packaging Research Center
Georgia Institute of Technology
Atlanta, GA, USA
The Low-Cost Silicon Interposer (LSIP) industry consortium at Georgia Tech is proposed to address limitations of current organic packages as well as wafer based silicon interposers that are being produced in wafer fabs. Organic substrates are seen as approaching limits in wiring, I/Os, warpage and acceptable cost. Silicon Interposers, on the other hand, suffer from high cost and low electrical performance. This paper addresses both these limitations.
As organic packages reach their limits in I/Os, thermal and reliability performances, silicon interposers are being developed using BEOL processes in the wafer fabs. But such interposers have two main problems: high cost and low performance. The Georgia Tech approach addresses both these problems as described in this paper.
Initially Published in the SMTA Proceedings