Susie Johansson & John Dzarnoski
Starkey Hearing Technologies
Eden Prairie, MN, USA
Fujikura America, Inc.
Santa Clara, CA, USA
The continuous drive to increase the density of electronic packaging began long before the invention of the transistor. This effort has grown on multiple fronts including telecommunications, aerospace, military, automotive, medical and consumer products. The hearing aid business has always demanded the use of extremely small electronic packaging due to the minimal space within the ear canal. In fact, in 1952, the first commercial device to make use of transistors was the hearing aid.
Complete hearing aid systems were created using ceramic hybrid-based system-in-package technology. In recent years hearing aid microelectronic packaging has been migrating away from ceramic hybrid-based packaging to flexible circuit-based technologies such as chip-on-flex. The introduction of wireless systems in hearing aids sharply increased the electronic component count from less than 20 per device in 2005 to more than 70 in 2010. All available space is essentially used. The densest packages yet were introduced in 2015 using embedded die modules in the smallest hearing aid sizes called invisible-in-the-canal or IIC. Additionally, more powerful processors and more memory are enabling sophisticated algorithms that are able to greatly improve sound quality. There continues to be a strong marketing desire to add more features to hearing products while consistently decreasing the size and visibility when worn. These added features are further increasing component count and therefore drive the need to make smaller electronic assemblies.
This paper will examine the use of second generation embedded die packaging, also called chip-in-flex, to drive significant further size reduction in custom hearing instruments over what can be achieved using chip-on-flex and ceramic hybrid-based technologies. The construction, size reduction, performance improvement, supply chain challenges, and electronic package reliability will be discussed herein [1, 2].
The second generation embedded die module using WABE technology reduced module size by 13% over the first generation, even though memory was doubled, and by 40% as compared to ceramic hybrid based packaging of the same new chip set. There was a huge 64% volumetric size reduction as compared to the original generation 1 SiP. Performance improved by a factor of six. Stress related performance changes associated with packaging were reduced by a factor of two. Extensive reliability testing was performed with all tests passed without issue. Embedded die modules using WABE technology has enabled continued electronic packaging size reduction while at the same time providing improved performance.
Initially Published in the SMTA Proceedings