Tony Lentz, Greg Smith
Greeley, CO, USA
Voids in solder joints are a concern for many electronic manufacturers. They create weakness in the solder joints which can lead to mechanical failure. Voids can slow or limit heat transfer away from the component which can lead to thermal failure. Voids can also interfere with electrical signal flow creating problems with the function of the circuit board. Minimization of voiding is beneficial for the life and function of the circuit assembly.
Voids are caused by many things. Via holes in pads can cause solder paste to flow away from the solder joint creating voids. Gases from via holes can move upwards into the solder joint creating voids. Incomplete wetting or flow of the solder paste can create gaps or voids in the solder joint. Gasses from solder paste fluxes can be trapped in the solder joint. Regardless of the cause of voids there are ways to minimize voiding.
Several methods of minimizing voids are presented in this paper. Stencil design can have a dramatic impact on voiding. Printing solder paste with gas escape routes is an excellent way to reduce voiding. When via in pad designs are used, voiding can be minimized by printing solder paste with a clearance around the via holes. Changes to the reflow profile can help reduce voiding, but the changes need to fit the solder paste. Adding a soak to the reflow profile can drive off volatile materials from certain solder pastes. Lengthening the time above liquidus helps volatile materials to escape from other solder pastes. The solder paste flux has a large influence on voiding. Some solder pastes have a lower potential for voiding than others. A test matrix was designed to validate these methods of minimizing voiding. Void measurements were taken, the data was summarized and a set of recommendations were made. This was all done in an effort to help the reader to "Fill the Void."
Voiding in solder joints is affected by many factors. As shown in this study, voiding is influenced by the solder paste flux chemistry, the stencil design and the reflow profile used. In this work, there was a clear difference in voiding from one solder paste to the other. The stencil design had a small effect on voiding, although the 5-dot pattern design showed higher voiding than window pane or diagonal stripe patterns. The reflow profiles tested had different effects on voiding for each of the solder pastes. The ramp to spike profile gave lower voiding with solder paste B, while the long time above liquidus - high peak profile gave lower voiding with solder paste A. This shows that the reflow profile must be paired with the solder paste and the stencil design in order to minimize voiding.
Only a small number of factors that influence voiding were studied in this work. There is much more testing to be done. Due to the commonplace use of bottom terminated components, it is clear that voiding will be an issue that many must address. The authors will continue to study factors that influence voiding in an effort to help the reader to "Fill the Void".
Initially Published in the SMTA Proceedings