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Control of the Underfill of Surface Mount Assemblies

Control of the Underfill of Surface Mount Assemblies
Paper addresses the control of surface mount under fill assemblies, focusing on inspection techniques and possible options to overcome their limitations.
Production Floor


Authored By:

Julien Perraud, Shaima Enouz-Vedrenne, Jean-Claude Clement
Thales Research and Technology
Palaiseau, France

Arnaud Grivon
Thales Global Services
Meudon La Foret, France.


Underfilling is a long-standing process issued from the micro-electronics that can enhance the robustness and the reliability of first or second-level interconnects for a variety of electronic applications. Its usage is currently spreading across the industry fueled by the decreasing reliability margins induced by the miniaturization and interconnect pitch reduction.

While material and processing aspects keep pace with the fast technology evolutions, the control of the quality and the integrity of under filled assemblies remains challenging in some cases, especially when considering non-destructive inspection techniques and board-level underfilling. In particular, Scanning Acoustic Microscopy (SAM) which is routinely used for the control of under filled flip-chips turns out to be almost ineffective for usual BGA devices due to the presence of the component PCB substrate.

This paper will address the control of surface mount under filled assemblies, focusing on applicable inspection techniques and possible options to overcome their limitations.


Underfilling, which is commonly used in micro-electronics and IC packaging, is spreading to a larger spectrum of applications as a response to the growing ruggedization needs driven by miniaturization. This process is currently becoming increasingly used at the board-level for a variety of applications such as fine-pitch BGAs of high-end PCBAs operating in harsh environment conditions.

Initially Published in the IPC Proceedings


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