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Review of Interconnect Stress Testing Protocols



Review of Interconnect Stress Testing Protocols
This research analyzes a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias.
Analysis Lab

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Authored By:


Edward Arthur
Raytheon Company, Space and Airborne Systems, El Segundo, California

Charles Busa, Wade Goldman P.E., Alisa Grubbs
The Charles Stark Draper Laboratory, Inc., Cambridge, Massachusetts

Summary


The use of microvias in Printed Circuit Boards (PCBs) for military hardware is increasing as technology drives us toward smaller pitches and denser circuitry. Along with the changes in technology, the industry has changed and captive manufacturing lines are few and far between. As PCBs get more complicated, the testing we perform to verify the material was manufactured to our requirements before they are used in an assembly needs to be reviewed to ensure that it is sufficient for the technology and meets industry needs to better screen for long-term reliability.

The Interconnect Stress Testing (IST) protocol currently used to identify manufacturing issues in plated through holes, blind, or buried vias are not necessarily sufficient to identify problems with microvias. There is a need to review the current IST protocol to determine if it is adequate for finding bad microvias or if there is a more reliable test that will screen out manufacturing inconsistencies.

The objective of this research is to analyze a large population of PCB IST coupons to determine if there is a more effective IST test to find less reliable microvias in electrically passing PCB product and to screen for manufacturing deficiencies. The proposed IST test procedure will be supported with visual inspection of corresponding microvia cross sections and Printed Wiring Assembly (PWA) acceptance test results. The proposed screening will be shown to only slightly affect PCB yield while showing a large benefit to screening before PCBs are used in an assembly.

The test vehicles will be production-built hardware from multiple suppliers over a 4-year time period, of 2010 to 2014, of polyimide and epoxy constructions. Both 152-um and 203-um diameter microvias will be reviewed. It will be shown that the initial IPC-TM-650 Number 2.6.26 DC Current Induced Thermal Cycling Test, dated May 2001 default conditions were not sufficient to adequately screen for microvia manufacturing inconsistencies and that, with a few changes to the current testing, high-reliability product could be screened quickly for current technology.

Conclusions


Soon after the conclusion of this study, the IPC-TM-650 Number 2.6.26A dated May 2014 was released. This version included typical test temperatures more in line with the temperatures used in this study. However, due to the high reliability requirement of our program, we believe that the IST protocol needed for screening reduced reliability microvias in electrically passing PCB product needed to exceed some of typical test conditions listed in the revised test method. In our case, reducing the failure threshold from 10% to 4% and increasing the number of cycles to 500 were significant factors.

Our data indicate that 250 cycles will not consistently screen less reliable microvias, as was seen in the review of our original PWA lot to the 250 cycle count. The 10% resistance threshold will find many of the gross issues, but a finer requirement of 4% is still within the limits of the test equipment and screened defects with fewer cycles.

Very few PCB panel lots completely failed the new test protocol, and in most cases of failed panels, there was rarely more than a single failed panel in a lot. For this reason, it is very important to screen for microvias by panel and not by manufacturing lot. Our microvia IST coupon has 144 microvias. We dramatically increase the percentage of tested microvias vs. microvias on total deliverable PCBs in a lot by testing 2 IST coupons per panel.

Due to what seems to be almost a random nature of manufacturing variability among microvias, multiple coupons should be tested per panel and pass both (a) IST protocol and (b) visual inspection (for compliance A/B) before the panel is accepted. As we learned in our experiments, not every panel will fail the IST criteria, even if its corresponding A/B coupons have deficient microvias.

Performing IST alone without a review of fine line separation at a suitable magnification may not limit the risk of a poor microvia escape. Our testing indicates that there is a correlation between a visual failure and an IST failure, but each was also seen with one failing while the other passed. We also determined that a very high magnification is required to reliably determine fine line separation in microsection coupons and have now integrated that in our specifications.

Our testing showed escapes from the IST testing, so we believe the visual inspection should be done in conjunction with the IST testing when accepting product. When working with high reliability product or high dollar production assemblies, earlier screening for manufacturing defects in microvias in the PCBs can save high-dollar value PWAs in the long run.

Initially Published in the IPC Proceedings

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