Authored By:
Chris Bailey, Ph.D.
University of Greenwich
London, United Kingdom
Summary
Semiconductor technology is increasingly meeting the demands and challenges posed by roadmaps such as ITRS in terms of technology scaling and packaging, where the interconnect size is decreasing to ever smaller dimensions. The drive for this is increasing functionality of the devices and is governed primarily by the consumer electronics markets.
For applications in high reliability sectors such as aerospace, automotive, oil and gas, etc, this scaling in technology, and the use of lead-free solders to satisfy ROHS legislation, is posing a number of challenges. This paper discusses current status in using lead-free components for high reliability applications and developments in modelling that can aid organisations in assessing different design options before using lead-free COTS components in their applications.
Conclusions
This paper has discussed some of the issues faced by organizations in the high reliability sector when adopting COTS and lead-free components. The paper also details some of the developments in modeling technologies that can aid organizations understand the impact of refinishing lead-free components, using underfills for second level interconnects and identify the impact of technology scaling on failure mechanisms such as metal migration.
Initially Published in the SMTA Proceedings
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