Authored By:
Paul Wang, Ph.D., David He, Vivi Cao, and Jason Su
MiTAC Computer Corp.
CA, USA
Summary
Journal Nature of June 14, 2018 report that the Antarctic ice sheet lost nearly three trillion metric tons of ice from 1992 to 20171. In just the last five years, the frozen continent has shed ice almost three times faster on average than it did over the previous 20 years. Combined all the water raised the global sea level by average 7.6mm, the researcher said about two-fifths of that rise occurred in the last five years. iNEMI Board Assembly Technical Roadmap2 of 2017 predict that the low temperature soldering (LTS) usage will increase to 20 plus percent by 2027. The drivers for this LTS technology trend are three folds, the energy and CO2 emission reduction, overcome material limitation in electronic component and PCB, and low soldering process to match with electronic miniaturization.
This article is a series of study on new low melting temperature solder interconnect application and reliability on various product categories, enterprise computers such as server and storage, AIO (all-in-one desk top), POS (Point of Sale), tablet, and automotive electronics. First, the raw LTS SnBiAg material properties range from power particle size, Halogen content, flux characterization, viscosity, wetting, SIR, Electrochemical migration etc. are assessed. Then five product emulators are selected as test vehicle to represent the broad scope of various electronics products. Due to the nature of brittleness of Bi contain in the LTS as shown in earlier publications3,4 the material drop cycle to failure reliability of LTS is substantially below current SAC305 which widely used in various electronics.
Mechanical strengthening mechanism such as corner bonding material is attached along the BGA to observe the susceptibility of mechanical shock in later two product emulators, tablet and automotive electronics. Since all BGA incoming with solder composition are in SAC305 nowadays there is a backward compatibility issue with new LTS. Inhomogeneous microstructure as well as potential solder defect was observed in SEM micrograph. Experiment of adding various LTS paste volume so as different Bi percentage in mixed alloy join are studied to see crack propagation and failure interface due to Bi diffusion and intermetallic compound formation when product emulator subject to accelerated stress test. While observe the crack propagation in microstructure, potential strengthening mechanism such as solid solution, precipitation hardening and phase size refinement can be determined in the of SAC and LTS mixed and Bi percentage variation alloy.
Finally BFT (board functional test) will be conducted in between accelerated thermal and mechanical cycling test to offline but real-time monitoring the reliability of solder joint of passive, PTH, BGA of active IC and CPU. The benefit of using product emulators with BFT is an advantage in the transition of LTS from SAC.
Conclusions
Reduction in energy consumption so as to prevent excessive CO2 emission into the atmosphere is a great benefit to the environment of planet earth. Reducing CO2 emission through alternative material application so as to reduce soldering temperature can be a potential major contribution from electronic industry. iNEMI Board Assembly Technical Roadmap2 of 2017 predict that the low temperature soldering (LTS) usage will increase to 20 plus percent by 2027.
In part 1 of the study on new low temperature solder interconnects application and reliability on various products, the lesson learns from the study are:
- LTS paste raw material is early in the development process. Inconsistent paste qualities in paste level test and product emulator were observed in one case. Flux chemistry stability is likely the logical root cause to cause solder ball residue and de-wetting.
- Paste printability is good with registration and volume/height maintain in acceptable Cpk level. Solder wetting in PTH and leaded device are normal and voiding percentage after reflow for major packages are below 10%.
- Expecting backward compatibility issue in material sourcing. Mixed alloy in component-SAC-LTS-circuit board system to be interconnecting reliability concern with observed Bismuth tend to form a bulk phase in both the lower LTS region as well as along the IMC and solder interface. Overall the IMC show similar thickness and composition as in pure LTS-LTS system.
- With brittle nature of the Bismuth phase in the matrix of β–Sn, it is logic fact that the higher the Bi diffuse into SAC ball and the more the Bi-phase homogeneously distributed in the mixed regions the reliable is the interconnect system. The research teams are looking forward to see the cycle to failure performance difference of mixed alloy system from LTS of supplier A vs. supplier B through drop test and ATC. Expect further study on Bi-phase behavior in crack propagation to prove these effects.
- Initial ATC result as of July 2018 indicates that the mixed SAC-LTS alloys are at least 250 cycles less reliable than LTS-LTS interconnect system. Dye penetration test show the crack interfaces are at package to soldering as well as at solder to IMC interfaces.
Initially Published in the SMTA Proceedings
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