Innovative of CU Electroplating Process for Any Layer Via Fillwith Planer



Innovative of CU Electroplating Process for Any Layer Via Fillwith Planer
PCB manufacturers need another additional processing step to chemically etch the deposit until they reach a planer surface to build the next layer without issues.
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Authored By:


Saminda Dharmarathna, Todd Clark, William Bowerman, Kesheng Feng, Jim Watkowski
MacDermid Enthone
CT, USA

Summary


Revolutionary new consumer electronic products and their miniaturization drives capitalization on the latest technologies available to increase the functionality of PCBs. High density interconnect (HDI) technology is one of the fastest growing in printed circuit board industry. This technology allow us to utilize the PCB real estate more efficiently by including laser microvias, fine lines PCBs. High density interconnect (HDI) technology is one of the fastest growing in printed circuit board industry. This technology allow us to utilize the PCB real estate more efficiently by including laser microvias, fine lines density enables more functions per unit area. Advanced HDI technology have multilayer PCBs with copper filled stacked microvias. These Advanced HDI PCBs could house more complex interconnect structures. These very complex structures provide the necessary connection pathways for modern day large pin-count chips.

Microvias play crucial role in HDI designs, mechanical or laser drilling of blind micro vias (BMV’s) and successive filling has become the standard manufacturing technique. Specially, small microvias laser drilling is the only possible way to achieve quality via geometry. A typical laser drilled microvia has a diameter of typically 150,125, or 100 µm. Which are optically aligned and with a pad diameter typically 300, 250 or 200µm, providing added routing density and reliable solder attachment. Most common arrangement of these microvias are via-in-pad, offset, staggered or stacked.

When processing multilayer PCB boards specially with stacked vias it is essential to have a planer via top after microvia fill. Vias with bumps as shown in Figure 1(a) will cause issues in bonding the next layer, and most importantly the bumps will interfere with the laser drilling of the next stocked via layer and cause the next layer to have uneven via geometry. Due to these disadvantages, PCB manufacturers need another additional processing step to chemically etch the deposit until they reach a planer surface to build the next layer without issues.

Here we discuss an innovative DC acid copper via fill formulation, for VCP (Vertical Continues Plating) applications. A flat top can be obtained after the viafill, no additional processing is necessary to planarize the surface such as chemical or mechanical polishing. Excellent filling was obtained with thin Cu on the surface ~ 10 µm when controlled within the given parameters. Process optimization thermal and physical characterization was also reported.

Conclusions


Here we present processes for acid copper via fill applications for any layer via fill. Formulations showed excellent via fill capability, with minimum surface Cu and most importantly gave a planer via top after filling the via. Evaluation of structure showed stable crystal structure during aging. The physical properties, tensile strength and elongation improved as the bath aged. All the additive components can be analyzed with Cyclic Voltammetry Stripping analysis.

Initially Published in the SMTA Proceedings

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