Electronics Assembly Knowledge, Vision & Wisdom
Ask the Experts
Stencil Cleaning Frequency
What is the industry standard for the amount of time between stencil cleaning?
Ask the Experts

View the Expert comments below.
,{url:'http://www.circuitinsight.com/videos/experts_final.mp4'}], clip:{autoBuffering:true, autoPlay:true, scaling:'scale' } }).ipad();

Arranged via association with Circuitnet..
See the Expert Panel | Submit A Questions | Join the Panel
Ask the Experts Question
Ask the Experts
Stencil Cleaning Frequency
What is the industry standard for the amount of time between stencil cleaning?
Expert's Panel Responses
I would recommend reviewing the IPC-7526 document, Stencil and Misprinted Board Cleaning Handbook. It's give you an excellent overview of stencil cleaning methods, available chemistry types, and process considerations. It will give you various options to consider when matching with your process and requirements.

Typically I would consider the following when setting up a cleaning cycle.
  • Smallest size of stencil aperture
  • Type of paste being cleaned of the stencil
  • Method of cleaning(Dry or Wet)
  • Type of cleaning solvent
  • Type of wiper paper
For a standard 0402(1002 metric) chip components, I would recommend every 3th print dry, 5th wet with vacuum + dry.
Note: This is derived from me the product that I use. You will need to inspect your post printing, and post reflow, to determine your optimum recipe.
Kishan Sarjoo
Process Engineering Manager - Electronics
Altech UEC, South Africa
Currently with Altech UEC and responsible for technology road map in PCBA electronic manufacturing and technical support for PCBA electronic manufacturing for Altech UEC and its JDM's. Over 7 years in SMT, Radial Insertion, Wave solder & Test Applications.
There is no established industry standard for a stencil cleaning interval. It depends on the complexity of the assembly, the solder paste you use, stencil  design and printer settings.

Rule of thumb is to clean your stencil once you begin to experience non-repetitive results. For example, I worked on an assembly with a component mix so high that we needed to clean the stencil every print due to small aperture clogs while on other assemblies we cleaned the stencil very 10-15 prints.
Edithel Marietti
Senior Manufacturing Engineer
Northrop Grumman
Edithel is a chemical engineer with 20 year experience in manufacturing & process development for electronic contract manufacturers in US as well as some major OEM's. Involved in SMT, Reflow, Wave and other assembly operations entailing conformal coating and robotics.
There isn't any "standard" for the number of prints between wipes. It is up to you to determine how many prints you can undergo before it is necessary to clean the stencil. It depends on several factors. If the initial setup is off, then you will need to wipe more often.

If the humidity and/or room temperature are too high, the paste will tend to slump and smear more easily, and you will need to wipe more often. If there are excessive HASL deposits near the apertures that prevent good gasketing between the stencil and the PWB, you will have some paste squeeze-out and will need to wipe more often. If the squeegee pressure is too high, the same squeeze-out can occur.

If separation of the flux and solids happens (inadequate mixing or poor quality paste) the flux will squeeze out onto the stencil and prevent a clean snapoff. The more apertures in the stencil, the more chances for issues; some boards will need to be cleaned at a higher frequency than others. Old paste will tend to be of a higher viscosity (dried out) and you will see more aperture clogs. On the other hand, excessively sheared paste (printed several times back and forth on the stencil without replenishment) will lose viscosity and be more likely to have squeeze-out issues.

There are a lot of reasons where you could find yourself having to clean after every print. With all of the variables under control, a good setup and good paste and a good environment (67 to 69 deg. F at 40-50%RH) you should be able to print at least 10 very complex PWBs before another wipe is required.

As I have pointed out in several previous posts, there are a large number of variables that must be controlled in both the paste handling and printing processes. If they are not controlled poor printing results, as well as more frequent cleaning of the stencil between prints.

This is why the controls over both the material (paste), the preparation (proper mixing to bring to room temperature and within the viscosity range on the manufacturer's Technical Data Sheet), and the printer setup are so critical; they can greatly affect the amount of touchup and rework required as well as the efficiency of the paste printing process itself.

Take the time to ensure you have control over the variables from the time the paste hits the dock all the way through the printing process; every minute invested in that endeavor will pay off at least 60 times in lost production time and rework hours and prematurely discarded solder paste.

It's not that hard to accomplish, but it takes a real paradigm shift or sea change in education, awareness, and attitudes to keep it going.
Richard D. Stadem
Advanced Engineer/Scientist
General Dynamics
Richard D. Stadem is an advanced engineer/scientist for General Dynamics and is also a consulting engineer for other companies. He has 38 years of engineering experience having worked for Honeywell, ADC, Pemstar (now Benchmark), Analog Technologies, and General Dynamics.
I don't know if there is an industry standard, but common sense would seem to dictate to clean the stencils as quickly as possible to prevent the paste from drying in the stencil apertures. Some of these apertures are so small, such as 01005 and 0201, you would want to the paste to still be viscous and not dried when being cleaned.

I would think that if the paste dried out, it would much more difficult to removed and in many cases would not be removed and this would be cumulative on subsequent usage of the stencil and completely plugged hole would be the result. 

It would also recommend that all facilities have semi or automatic cleaning systems to clean the stencils to reduce the variable of cleaning them manually.
Leo Lambert
Vice President, Technical Director
EPTAC Corporation
At EPTAC Corporation, Mr. Lambert oversees content of course offerings, IPC Certification programs and provides customers with expert consultation in electronics manufacturing, including RoHS/WEEE and lead free issues. Leo is also the IPC General Chairman for the Assembly/Joining Process Committee.
Your question is an excellent one. There is a Grand Canyon-sized gulf between production engineers in the electronics world as they debate the optimal stencil printing process. Some engineers clean after every print; some clean after twenty.

Some supplement the cleaning with multiple passes of the cleaning rolls, with solvents, with interim-cleanings using pre saturated wipes and even ultrasonic cleaning of the difficult areas of the stencil. Then there are the "outside" experts: the stencil printer makers, the stencil cutters, the solder paste companies, and even the customers. It's a mosh-pit of opinions; real data is hard to find.  

Why do we work so hard? The SMT process, when fine-tuned, deliveries economies of scale and through-put which could be achieved by no other technology. The total annual value of the electronics assembly industry probably exceeded $1 trillion in 2014  - a staggering output by any measure. The vast majority of this output is in the form of surface-mount circuit boards, which means somebody, somewhere, is struggling with their stencil printing process.  

At the heart of the SMT process, stencil printing is the weakest link in electronics production. The mere complexity of the process is causing costs to rise and yields to fall. One industry expert (se: Richard Clouthier, "The Complete Solder Paste Printing Process: Stencil Aperture Area Aspect Ratio," SMT Magazine, January 1999) found 39 process variables that must be controlled to get reasonable yields in today's stencil printing process.   

In another perspective on the limits of current technology, experts estimate that more than 50% of today's production defects are caused by errors in the screen printing process , and another industry leader has privately confessed to this author the number actually is closer to 90%).  As noted by Kamen, Goldstein, Asarangchai, et al. in "Analysis of Factors that Affect Yield in SMT Assembly"%2
Mike Jones
Vice President
Micro Care
Mr. Jones is an electronics cleaning and stencil printing specialist. Averaging over one hundred days a year on the road, Mike visits SMT production sites and circuit board repair facilities in every corner of the globe, helping engineers and technicians work through the complex trade-offs today's demanding electronics require.
I'm not aware of an "industry standard" as far as time between cleanings goes, usually it's set up based on frequency of prints. Obviously the stencil should be cleaned if the prints start looking poor. For No-Clean pastes, I recommend every 3 PCB's for fine pitch devices, 5-10 for normal.

You can usually go a little longer with water soluble paste, but no need to push it. After breaks, lunches and shift changes, or any time there is more than 10-15 minutes between prints. Try doing some experiments to dial in your needs based on your technology and pastes.
T.J. Hughes
Manufacturing Engineer
Esterline Interface Technologies
Mr. Hughes has been in the electronics manufacturing field for 20 years. Operating the processes and as a manufacturing engineer for the last 14 years. He is also a CIT as well as an SMTA Certified Process Engineer.
The time between stencil cleaning is going to depend on your type of solder paste and printing process. If you use an SPI machine, this will tell you when your stencil needs cleaning. Some SPI machines have closed loop feed back to the screen printer, signaling when to clean.

If post print inspection is Done manually, you will need to closely monitor your process to develop a screen cleaning frequency. Your environment also plays a big role in cleaning screens. If you do not have a good temperature and humidity control system, you may have a difficult time coming up with a consistent cleaning cycle.
Brien Bush
Manufacturing Applications Specialist
Cirtronics Corp.
Mr. Bush has 20 years experience in electronics contract manufacturing. Major areas of expertise include through hole, SMT, wave and selective soldering.
Assuming that you are talking about the frequency of an under stencil wipe, there is no standard. It is very process dependent. A good practice is a dry wipe every 6 to 10 prints.  

If you find that you have to wipe more frequently and/or use a solvent wipe followed by a vacuum cycle, that is a good indication that something is wrong with the printer set-up; like poor gasketing.
Eric Bastow
Senior Technical Support Engineer
Indium Corporation
Eric is an SMTA-certified process engineer (CSMTPE) and has earned his Six Sigma Green Belt from the Thayer School of Engineering at Dartmouth College. He is also a certified IPC-A-600 and 610D Specialist. He has an associate's degree in Engineering Science from the State University of New York and has authored several technical papers and articles.
I would recommend you obtain, IPC-7526, which covers all aspects of stencil cleaning...
Jerry Karp
JSK Associates
Based in. Northern California since 1971. Founded JSK Associates in 1979. Actively involved in soldering, cleaning, chemistries. 30 years experience in EOS/ESD control.
There are a lot of factors that will determine the stencil cleaning frequency
  • Assembly population complexity
  • Smallest aperture
  • Stencil thickness
  • Solder paste used
  • Equipment capabilities regarding cleaning - dry, wet, vacuum options + solvents used
  • Humidity and temperature (environment)
  • Paste time on the stencil
  • Blade angle
  • Using nano-coating or not
  • Stencil material and manufacturing method
You will have to perform a capability study for each assembly that you are running.
Georgian Simion
Engineering and Operations Management
Independent Consultant
Georgian Simion is an independent consultant with 20+ years in electronics manufacturing engineering and operations.
Contact me at georgiansimion@yahoo.com.
Submit A Comment

Comments are reviewed prior to posting. Please avoid discussion of pricing or recommendations for specific products. You must include your full name to have your comments posted. We will not post your email address.

Your Name






Please type the number displayed into the box. If you receive an error, you may need to refresh the page and resubmit the information.

Related Programs
bullet Is No-Clean the Trend for QFN Components?
bullet Cleaning R.F. Circuits - Aqueous or Vapor?
bullet Evaluating Rinsing Effectiveness in Spray-In-Air Cleaners
bullet Ultrasonic Cleaning and Surfactants
bullet PCBA Cleaning with Sodium Bicarbonate
bullet Challenging Cleaning Problem
bullet Delay Before Cleaning Partial Assemblies
bullet Trichloroethylene Alternative
bullet Can Water be Harmful to Electronics Components?
bullet pH neutral Cleaning Agents - Market Expectation & Field Performance
More Related Programs