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Influence of Plating Quality on Reliability of Microvias

Influence of Plating Quality on Reliability of Microvias
This paper addresses the influence of voids on reliability of microvias, as well as the interface delamination issue.
Analysis Lab


Authored By:

Yan Ning, Michael H. Azarian, and Michael Pecht
Center for Advanced Life Cycle Engineering (CALCE) University of Maryland
College Park, MD


Advances in miniaturized electronic devices have led to the evolution of microvias in high density interconnect (HDI) circuit boards from single-level to stacked structures that intersect multiple HDI layers. Stacked microvias are usually filled with electroplated copper. Challenges for fabricating reliable microvias include creating strong interface between the base of the microvia and the target pad, and generating no voids in the electrodeposited copper structures.

Interface delamination is the most common microvia failure due to inferior quality of electroless copper, while microvia fatigue life can be reduced by over 90% as a result of large voids, according to the authors' finite element analysis and fatigue life prediction. This paper addresses the influence of voids on reliability of microvias, as well as the interface delamination issue.

In a prior study, the authors investigated stress levels of copper-filled microvias with spherical voids of different sizes. Besides void size, void shape and microvia aspect ratio also affect the stress levels, and hence reliability of voided microvias. In this paper, stacked microvias with different void shapes and aspect ratios were modeled using finite element method.

Stress distributions of these microvia models under cyclic thermal loading were examined to determine the effects of the voids on the reliability of microvias at different circumstances. The finite element modeling results demonstrated that conical voids resulted in higher stress levels in microvias than spherical voids of the same size. For the same void shape, larger voids increased the stress level, except for very small spherical voids which reduced the maximum stress in the microvias.

To study the delamination issue, the very thin layer of electroless copper was simulated between the base of the microvia and the target pad. It is assumed that the delamination was due to fracture within the electroless copper layer. The fracture toughness parameter in terms of stress intensity factor was calculated under different initial crack length and thermal loading conditions to characterize the likelihood of the delamination.


This paper provides the first study on delamination between microvia base and target pad using fracture analysis. A higher load level always resulted in a larger stress intensity factor - more likely to cause fracture and delamination. For Mode I fracture, a smaller initial crack length resulted in a larger stress intensity factor, and therefore was easier for the crack to grow. The Mode II stress intensity factor was less sensitive to the initial crack length.

As the most common failure mode, the delamination issue is worthy of more attention and future studies. The authors are interested in designing proper experiments to measure the critical fracture mechanics parameters (e.g. critical stress intensity factor or critical energy release rate) of the electroless copper, and simulate the crack growth process. Temperature, copper grain size, and cyclic loading all can affect the critical fracture mechanic parameters and the crack growth process.

These variables will be considered in future research. Additionally, it is interesting to study the delamination on the interface between electroless copper and electrolytic copper (on microvia base or target pad), as well as estimate the competing failure mechanisms of the interface delamination and fracture in electroless copper.

Initially Published in the IPC Proceedings


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