Electronics Assembly Knowledge, Vision & Wisdom
3D IC Integration Technology Development in China
3D IC Integration Technology Development in China
China's semiconductor foundry and microelectronic packaging industries are embracing the move to join 3D IC integration.
Production Floor

Authored By:
Wei Koh, Ph.D.
Pacrim Technology
Irvine, CA, USA
,{url:'http://www.circuitinsight.com/videos/programs_final.mp4'}], clip:{autoBuffering:true, autoPlay:true, scaling:'scale' } }).ipad();
Summary
China's semiconductor foundry and microelectronic packaging industries are embracing the move to join 3D IC integration technology development with ample funding and rapid pace. An overview of the recent progress on the efforts in 3D IC integration technology development by the leading domestic companies and research institutes is provided here.

Because China still lacks in infrastructure for advanced and modern front end of the line (FEOL), backend of the line(BEOL), and middle-end of the line (MEOL) process capabilities for 300mm wafers, development efforts on 3D IC integration have many limitations to begin with. The efforts adopted by some leading research institutes and back-end packaging assembly and test companies; however, appear to be quite ingenuous and pragmatic, by selecting more easier "cutting-in" research projects and processes that require less initial capital investment and infrastructural establishments.

The pattern of latest development efforts can be divided into two major areas: 1) TSV materials, processing, and interconnection; 2) low-cost interposer and 2.5D integration assembly application in wafer level CSP packages for MEMS and sensors using small-sized wafers. The short term perspectives and longer term growth opportunities for China's indigenous development efforts on 3D IC integration is summarized in conclusion.
Conclusions
A multi-pronged progress in 3D IC integration research has been made by several leading research institutes and companies such as Huawei and JCAP within just a few years. Many applications are aimed at using 4 and 6-in size wafers, where wafer thinning, bonding and TSV fabrication are relatively easier compared to that for 300mm wafers. The near term fruit and resulting strength in China's efforts will be in practical, low-cost applications for camera modules, sensors, and MEMS.

Some companies (Huawei, SMIC) are also planning to move into more complex interposers and 2.5D integration applications. In China, there are still plenty of market opportunities and growth potentials for mobile and computing devices to adopt 3D IC integration technologies for eventual high volume manufacturing in the coming years.
Initially Published in the SMTA Proceedings
Submit A Comment

Comments are reviewed prior to posting. Please avoid discussion of pricing or recommendations for specific products. You must include your full name to have your comments posted. We will not post your email address.

Your Name


Company


E-mail


Country


Comments


Authentication

Please type the number displayed into the box. If you receive an error, you may need to refresh the page and resubmit the information.



Related Programs
bullet Miniaturization of Hearing Aid Electronics Using Embedded Die Packaging
bullet Status and Outlooks of Flip Chip Technology
bullet Multilayer Ceramic Capacitors: Mitigating Rising Failure Rates
bullet Three Dimensional Integration Focusing on Device Embedded Substrate
bullet Leadless Flip Chip PLGA for Networking Applications
bullet New Approaches to Develop a Scalable 3D IC Assembly Method
bullet Flip Chip LED Solder Assembly
bullet 3D IC Integration Technology Development in China
bullet Fine Pitch CU Pillar with Bond on Lead Assembly Challenges for High Performance Flip Chip Package
bullet Failure Modes in Wire Bonded and Flip Chip Packages
More Related Programs