Electronics Assembly Knowledge, Vision & Wisdom
Embedded System Access
Embedded System Access
This paper discusses test access methodologies and elaborates on Embedded System Access strategies in particular.
Analysis Lab

Authored By:
Heiko Ehrenberg
GOEPEL Electronics LLC
Austin, TX, USA

Thomas Wenzel
GOEPEL Electronic GmbH
Jena, Germany
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Throughout a product's life cycle it may need to be tested various times. New product designs need to be validated during the prototyping phase, manufacturing defects need to be detected and diagnosed during the production phase, and products may need to be tested and/or updated while they are in use at the end customer, while defective units returned from the field need to be retested.

This paper discusses different test access methodologies and elaborates on Embedded System Access (ESA) strategies in particular, with examples for its use in practice.
The trend of employing non-invasive test access strategies, initiated in 1990 with the ratification of IEEE Std 1149.1, has spawned a number of new technologies and methodologies which combined have given birth to the category of embedded system access techniques. The essence of embedded system access is the provision of test pin electronics in the target system itself. Activating ESA results in a temporary transformation of the respective system, allowing it to be tested in partitions by means of embedded test centers under control of the integrated test bus.

Key elements of this infrastructure include boundary-scan devices, microprocessors, FPGAs and devices (such as ASICs) with chip-embedded instruments. The transition to embedded system access enables the observation and stimulation of signals directly in the circuitry, without signal distortion created by cabling and probing, making ESA a perfect foundation for the test of high-speed signals.

At the same time, ESA provides enormous potential for completely new test and measurement applications, which require a new generation of ATE solutions. Pioneers in this arena are multi-dimensional JTAG / boundary-scan instrumentations platforms with capabilities for interaction with other test access technologies.

Further developments in embedded system access will be influenced by new standards related to the test bus interface, such as IEEE Std 1149.7, and by the control of chip-embedded instruments as defined in IEEE P1687 and through features defined in the latest revision of IEEE Std 1149.1. In addition, especially new instrument IP - either as hard macros or as FPGA embedded soft macros - will drive the innovation in test, measurement, and programming applications and will continue to blur the lines between chip test and board test.

We don't expect the industry as a whole to suddenly change direction to embedded system access as the strategy of choice within the next few years; migration strategies and combinations of access techniques will be the key, since invasive test access will remain widely used during this decade.
Initially Published in the IPC Proceedings
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