Electronics Assembly Knowledge, Vision & Wisdom
Electrical Test Conditions & Considerations
Electrical Test Conditions & Considerations
When an OEM is deciding requirements for a particular part regarding Electrical Test, some over precautions and disconnects may occur.
Analysis Lab

Analysis Lab programs cover topics including:
Corrosion, Contamination, Data Acquisition, ESD and EOS, Inspection, Measurement, Profiling, Reliability, R&D, RFID, Solder Defects, Test, Tombstoning, X-ray and more.
Authored By:
Rick Meraw (Primary Author), Senior VP USA Operations
Todd Kolmodin (Co-Author), Vice President Quality North America
Gardien Services USA Inc
Forest Grove, Oregon USA


Summary
The PCB industry is ever changing and adapting to new technology. OEM specifications and requirements have also advanced due to these technologies. With these advancements some things will still remain the same and some requirements will change.

PCB manufactures are told what electrical test requirements are necessary for a given particular part via a FAB (Master) drawing. This is usually done during the "quoting" or "procurement" phase. When an OEM is deciding what requirements are required for a particular part regarding Electrical Test, some over precautions and/or disconnects may occur.


Conclusions
When testing PCBs it can be quite confusing as to what method to use, parameters are necessary for the Performance Class and what cost to associate in the build to way against the long term reliability of the product. Design anomalies and capacitive cores can further cause stress in the once thought streamlined process.

Understanding how the machines and methods test the product up front may alleviate delays and unnecessary waste in what otherwise would have been conforming product and delivered on-time. From the OEM side the better understanding of how the methods and parameters work against the product can better inform the manufacturer of possible anomalies in the final inspection process. If these are communicated up front, unnecessary delays can be omitted.


Initially Published in the IPC Proceedings

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