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Advanced Second Level Assembly Analysis Techniques
Analysis Lab |
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Authored By:Ken Chiavone Akrometrix Atlanta, Georgia SummarySMT assembly planning and failure analysis of surface mount assembly defects often include component warpage evaluation. Coplanarity values of Integrated Circuit packages have traditionally been used to establish pass/fail limits. As surface mount components become smaller, with denser interconnect arrays, and processes such package-on-package assembly become prevalent, advanced methods using dual surface full-field data become critical for effective Assembly Planning, Quality Assurance, and Failure Analysis. A more complete approach than just measuring the coplanarity of the package is needed. Analyzing the gap between two surfaces that are constantly changing during the reflow thermal cycle is required, to effectively address the challenges of modern SMT assembly. To fully understand and characterize variation in the gap that is the main cause of solder joint defects such as head-in-pillow, shorts, and opens, analysis of the interface between the mating surfaces needs to be: •Full-field: A high density of data represents surface warpage much more finely than an approximation such as coplanarity, allowing area-specific review and analysis •Dual-surface: Making assumptions about how the "bottom" surface is shaped when mounting a component neglects the complex behavior the land area might exhibit during the thermal cycle, and is a deficiency when attempting thorough assembly planning or failure analysis •Full-profile: Making assumptions about when the single temperature when warpage of surfaces is important during the thermal cycle can lead to missing critical parts of the reflow process, overlooking when defects such as head-in-pillow can be caused •Statistical: A large enough quantity of samples should be measured to allow confident calculation of expected average, maximum, minimum, and extreme (36) gaps between surfaces. After measuring warpage of multiple surface mount components and land areas separately, the collected data can be combined into statistical summaries for each temperature point. Reviewing the combined data at the start of assembly planning can provide an overview of dual-surface warpage at each temperature, and for the entire thermal profile. The measurement and analysis results that follow include a package-to-board assembly interface case study, and calculations, graphs, and methodology highlighting the use of gap limits and pass/fail maps to visualize areas with potential assembly issues. This analysis method provides new capabilities when planning and monitoring the assembly interface across a full reflow cycle that can help predict and compensate for defects such as head-in-pillow. ConclusionsThe problem of head-in-pillow presented at APEX 2009, and all the associated process challenges with BGAs including fine pitch BGAs it described, have not gone away. Instead, the increasing use of new and thinner materials and finer ball pitches has made defects caused by warpage even more of a reflow assembly problem. The industry trend toward thinner, more powerful mobile devices, and the associated need for reliable package-on-package (PoP) assembly, is another reason head-inpillow remains a critical defect type that must be avoided during design of assemblies, and through adjustment and control of process variables. Many SMT electronics manufacturers have measured the full-field shape of surfaces throughout reflow for the past ten years or longer. Today, most major manufacturers are measuring the shape of their components' attach surfaces across reflow temperatures, as a daily routine. To best avoid and compensate for designs that have a tendency to develop shorts, opens, or head-in-pillow defects, companies responsible for development of components on either side of the assembly also need to plan for how the shape of that component will match with its mating part, to ensure that expected gaps at each critical temperature point are appropriate. Because of the small interconnect gaps the structure of surface mount products allows, 'designing for assembly' is critical. Those responsible for the reflow assembly of SMT components also need similar interconnect gap analysis at various temperatures, to adjust various process parameters to produce the most reliable solder joints possible. The analysis method shown here is much more complex and involved than just measuring coplanarity and checking if it is less than a certain limit. Critical temperature points must be reviewed. Gaps per interconnect must be examined, possibly with a variety of statistical surface combinations to review the range of possibilities that will exist in production. Analyzing dual surfaces is certainly more challenging than traditional warpage analysis. But trends in electronics product design and manufacturing are creating more difficult SMT assembly and reliability scenarios. These more complex problems create the need for more complex analysis methods, including the need to collect, combine, and review data from both components involved in each SMT assembly. In many cases, just analyzing package coplanarity at elevated temperature is no longer effective. By looking at both surfaces together, product designs can be validated, assembly process variables can be planned, and reliability and compatibility of components can be monitored, through use of full-field, dual-surface gap analysis across the critical temperatures of the reflow profile. Initially Published in the IPC Proceedings |
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