Electronics Assembly Knowledge, Vision & Wisdom
Minimizing Voiding in QFN Packages
Minimizing Voiding in QFN Packages
This paper quantifies the preform requirements and process adjustments needed to minimize voiding in QFN packages.
Production Floor

Authored By:
Seth J. Homer and Ronald C. Lasky, PhD, PE
Indium Corporation, Clinton, NY USA
,{url:'http://www.circuitinsight.com/videos/minimize_voiding_qfn.mp4'},{url:'http://www.circuitinsight.com/videos/programs_final.mp4'}], clip:{autoBuffering:true, autoPlay:true, scaling:'scale' } }).ipad();
Transcript
According to Prismark Partners, the use of QFNs is growing faster than any package type except for flip-chip CSPs. Prismark projects that by 2013, over 32 billion QFNs will be assembled worldwide, which represents 15% of all IC packages. However, QFNs can be a challenge to assemble, especially when it comes to voiding.

In most QFN assembly processes, solder paste is used as a means of attachment. This approach can be problematic, as excessive voiding often occurs due to the lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such voiding by increasing the solder volume of the joint without adding flux volume. Adding preforms to an assembly process is very easy.

Preforms are packaged in tape & reel for easy placement by standard pick and place machines, right next to your components. The focus of this paper will quantify the preform requirements and process adjustments needed to use preforms in a standard SMT process. In addition, experimental data showing void reduction using preforms will also be presented.
Summary
According to Prismark Partners, the use of QFNs is growing faster than any package type except for flip - chip CSPs. Prismark projects that by 2013, 32.6 billion QFNs will be assembled worldwide, which represents 15% of all IC packages.

However, QFNs can be a challenge to assemble, especially when it comes to voiding. In most QFN assembly processes, solder paste is used as a means of attachment. This approach can be problematic, as excessive voiding often occurs due to the lack of standoff on the component and the high flux content of the paste. The addition of a solder preform can reduce such voiding by increasing the solder volume of the joint without adding flux volume.

Adding preforms to an assembly process is very easy. Preforms are packaged in tape & reel for easy placement by standard pick and place machines, right next to your components. The focus of this paper will quantify the preform requirements and process adjustments needed to use preforms in a standard SMT process. In addition, experimental data showing void reduction using preforms will also be presented
Conclusions
As stated, voiding under QFNs is attributed to flux entrapment and/or lack of solder in the joint. The addition of a solder preform dramatically increases the solder content without excessive flux. The additional solder density residing in the center of the pad also inhibits the development of a large void.

To minimize voiding design considerations should include:
Stencil Design: manufacturer recommended
Solder Preform Geometry: approx. 85% thermal pad dimensions and 50% paste thickness
Placement Parameters: increase placement pressure, muzzle selection
Flux Coating: required for solder preform/QFN interface
Reflow Profile: dependent/flexible
Initially Published in the IPC Proceedings
Submit A Comment

Comments are reviewed prior to posting. Please avoid discussion of pricing or recommendations for specific products. You must include your full name to have your comments posted. We will not post your email address.

Your Name


Company


E-mail


Country


Comments


Authentication

Please type the number displayed into the box. If you receive an error, you may need to refresh the page and resubmit the information.



Related Programs
bullet Selective Printing for BGA Components
bullet Assembly Options for Handheld Products
bullet Assembling Boards with BGAs on Both Sides
bullet Problems to Look for with Crimp Terminations
bullet How to Clamp Odd Shaped Circuit Boards
bullet Assembly and Reliability Investigation of PoP
bullet Evaluation of Stencil Materials, Suppliers and Coatings
bullet What is Solder Paste Working Life on a Stencil?
bullet How To Calculate Component Standoff Height
bullet Humidity Inside Our Screen Printer
More Related Programs
About | Advertising | Contact | Directory | Directory Search | Directory Submit | Privacy | Programs | Program Search | Sponsorship | Subscribe | Terms

Circuit Insight
6 Liberty Square #2040, Boston MA 02109 USA

Jeff Ferry, Publisher | Ken Cavallaro, Editor/Business Manager

Copyright © Circuitnet LLC. All rights reserved.
A Circuitnet Media Publication