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Solder Bumping for Flip Chip Technology
Solder Bumping for Flip Chip Technology
Paper presents new cost-efficient solder bumping and adapted assembly technologies for processing flip-chips.
Materials Tech

Authored By:
Florian SchuBler
University Erlangen-Nuremberg
Institute for Manufacturing Automation and Production Systems
Erlangen, Germany

Rainer Dohle, Dr.-Ing.
Micro Systems Engineering GmbH, Berg, Germany

Thomas Oppert, Ghassem Azdasht
PAC TECH - Packaging Technologies GmbH, Nauen, Germany

Georgi Georgiev
KSG Leiterplatten GmbH, Gornsdorf, Germany

Jorg Franke
University Erlangen-Nuremberg
Institute for Manufacturing Automation and Production Systems, Erlangen, Germany
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Summary
In this paper we will present new cost-efficient solder bumping and adapted assembly technologies for the processing of flip-chips with a pitch of 100 μm or less and solder ball diameters of 60 μm or 50 μm, respectively. The wafer bumping has been realized using a highly efficient Wafer Level Solder Sphere Transfer (WLSST) process. This technology uses a patterned vacuum plate in order to simultaneously pick up all of the preformed solder spheres, optically inspect for yield, and then transfer them to the wafer at once. This paper will discuss this technology and the process parameters for producing fine pitch solder bumps. The flip-chips were assembled on special BT- and FR4-material using reflow soldering.

Due to the large thermal expansion mismatch between substrate and chip, special epoxy based underfill has to be used in order to increase the long term reliability of the lead-free solder joints. The use of capillary flow as well as of no flow underfill and applicable design rules for these highly miniaturized structures will be discussed. For cost efficiency reasons all processes investigated base upon standard processes of the surface mount technology, but are adapted to the requirements of highly miniaturized components. Results of the reliability tests will be discussed additionally. An analysis of the failure mechanism will be given and recommendations for further miniaturizations will be presented.
Conclusions
In conclusion, we have presented a new low-cost manufacturing technology for ultra fine pitch flip-chip applications based upon standard processes of the surface mount technology. Solder spheres with a diameter of 60 μm as well as 50 μm can be placed onto wafers simultaneously using the highly efficient and flexible wafer level solder sphere transfer process also known as gang ball placement with very high yield.

The automatic assembly of the flip-chips has been demonstrated. The yield of the flip-chip process is depending from layout and tolerances of the printed boards, especially from solder mask registration and solder mask tolerances. With the final printed board layout we obtained 100 percent assembly yield (n=32) after underfill. The root cause for early failures during temperature cycling could be identified and will be conducive to improved reliability results using printed boards with the final layout. Underfill selection and underfill process optimization are crucial for the long term reliability of those extremely high miniaturized assemblies.
Initially Published in the SMTA Proceedings
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