Board Performance after Pb-Free Reflow



Board Performance after Pb-Free Reflow
This paper will focus on air-air thermal cycling, IST testing and material survivability after lead-free assembly reflow.
Materials Tech

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Authored By:


Joe Smetana, Alcatel-Lucent
Thilo Sack, Celestica
Wayne Rothschild, IBM
Bill Birch, PWB Interconnect Solutions
Kim Morton, Viasystems

Transcript


The High Density Packaging Users Group consortia completed an extensive study of 29 different bare board material and stack up combinations and their associated performance after 6X lead-free reflow at 260 degrees C.

Data presented in this paper will focus on air-air thermal cycling, IST testing and material survivability after lead-free assembly reflow.

Test board design aspects, manufacturing processes, and failure analysis data will be presented. The impact of plated through hole pitch on laminate integrity and how material properties relate to the results will be discussed.

Summary


The High Density Packaging Users Group (HDPUG) consortia completed an extensive study of 29 different bare board material and stackup combinations and their associated performance after 6X Pb-free reflow at 260°C. Data presented will focus on the air-air thermal cycling, IST testing and material survivability after Pb-free assembly reflow portions of this testing. Test board design aspects, manufacturing processes, Weibull analysis, and failure analysis data will be presented. The impact of plated through hole pitch on laminate integrity and how material properties relate to the results will be discussed.

Conclusions


Understanding, bare board material compatibility with Pb-free assembly and reliability after Pb-free assembly is significantly more complex endeavor than it was for SnPb assembly. Board design factors, specifically thickness, resin content, and via pitch play a major role in the assembly survivability and long term reliability. Additionally, the complexity of the PCB assembly and the associated required thermal processes and temperatures to achieve proper assembly and rework also play a major role. Materials can no longer be specified only by Tg and expected to survive assembly reflow, much less be reliable long term.

The traditional factors of fabricator quality and plating quality remain as important if not more important than they were with SnPb assembly. Specifying other material properties, such at Td, T260, CTE Z, etc. is helpful but also insufficient in specifying materials for Pb-free assembly. A significant issue with this is the lack of correlation between material supplier reported material properties and the actual measured properties of the material on real boards. Improved industry standards are needed to address this issue.

As it currently stands, to fully understand the compatibility of materials with Pb-free assembly and their ultimate reliability requires extensive testing, that is time consuming and costly. Internal delamination can occur on circuit boards with no visible evidence that it has occurred. Caution by the user is required.

Initially Published in the IPC Proceedings

Comments

  1. How were the panels deburred?
  2. What was the target electroless copper thickness using the C3000?
  3. Process suggests copper strike was performed as a panel plate. What was the target copper strike thickness?
  4. Was electrolytic copper bath CVS analysed? Can the full bath analysis data be provided?
  5. What was the panel size and orientation in the DEP and lytic lines?
  6. Can a plot of the Reflow profile actually used be provided? Was the chain continuity monitored. Was current induced heating used to simulate reflow or actual forced air convection? Current induced reflow simulation does not duplicate forced convection reflow. According to Board Pre-condition section, samples were run through a 10 zone forced convection oven. Too bad the chain resistance was not recorded during the convection air reflow pass.
  7. Can the completed cross-sections be treated by ion-mill to reveal filler dispersion near internal copper features in proximity of cracks?
  8. Peak temperature of 260 C +5 C, -0 C not realistic since samples unpopulated. Data suggests samples were overstressed. Reflow profile temperature at PWB surface did not consider component mass. Typical Lead-free peak temperature is 245 C. Thick PWBs are internally cooler. Compare soak time for 217 fraction above 250 C to reality.

    All cores are signal-plane. Was the copper treatment used for bonding? Were the cores scanned in AOI?
  9. Glass treatment for resin adhesion has always been substandard in the PWB industry. Resin needs to wet and bond to each glass fiber. Fillers are never distributed through the laminate/prepreg. The glass fabric filters the filler and the resin flow characteristics result in resin rich areas.
  10. Current induced reflow simulation does not reproduce forced convection thermal stress. Best to run forced convection reflow and record insitu chain resistance with sample surface temperature. Compare.
  11. Pad rotation shown in Figure 16 cross-section show influence of z-axis resin expansion. If the PTH barrel was stretched the same amount by the resin, the pads would not have remained distorted correct? The barrel z-axis stretch seems to lag compared to the pads embedded in the resin.
  12. Agree that internal crack detection must be improved.
  13. Tests must never be proprietary.
  14. Unfortunate that published paper is so old. Many participants no longer exist.
  15. Pitch and pad diameters are decreasing. Copper thickness plays some roll in how fillers are dispersed and how glass fabric is distorted. Fabric style, yarn pitch, embedded stress, are difficult to reproduce and therefore data variation is high.
  16. Unless it is possible to drill without using mechanical drill bits, glass to resin coupling agents must be improved. Each glass fiber must be surrounding by some finite thickness of resin otherwise mechanically induce drill damage propagates. One measure of laminate quality may be some measure of this damage. If moisture or processing fluids are suspected, lets test for this and determine extent.
  17. Please provide tabular IST and ATA recorded data.

Jerry Magera, Motorola Solutions

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